The SDH standards

Date: 2015-10-07; view: 423.

Exercise 7

Exercise 6

a) Translate into Russian in writing part 42.3 paragraphs 4,5 ( starting with “Before examining the questions… “)

b) Translate into Russian in writing part 42.3 paragraphs 6,7 ( starting with “This process of loading… “)

Make a short report on the basis of SDH.

Part 2 (42.3.1-42.4.2)

1. The concept of pointers

2. The SDH standards

3. Path OverHead information

4. Multiplexing of Virtual Containers

There are now a dozen or more CCITT recommendations describing various aspects of SDH, but the centre-piece of the whole group is undoubtedly CCITT G.707/8/9. These three standards define the SDH multiplexing structure and the ways that non SDH traffic channels can be mapped into the SDH Virtual Containers. Other standards in the group deal with such things as the functionality of multiplexers (G.781/2/3), the management requirements of such equipment (G.784), and the equivalent recommendations for line systems (G.958). Optical interfaces for all types of SDH equipment are covered in G.957. Further standards (G.sdxcl/2/3, still in the draft stages) address the functionality of synchronous cross con­nects. Finally there are two more standards (G.snal/2), which ad­dress the way that entire SDH based networks should be constructed in order that they can interwork successfully with other such net­works and, even more importantly, so that the management of these networks can be brought under software control. Nevertheless, because of their central role in SDH, we shall concentrate mainly on explaining G.707/8 & 9.

Bearing in mind the nesting of smaller VCs within larger ones, and thence into STMs, the best way to appreciate the details of the SDH multiplexing standards G707/8/9, is to follow the progress of a hi-directional 2Mbit/s plesiochronous circuit, which, for part of its journey, is transported across an SDH based network. (See Figure 42.8.) Such a 2Mbit/s circuit could be a channel between two PSTN switches, or it could be a private leased line which is connecting two PBXs. Although the 2Mbit/s circuit is bi-directional, the SDH operations are identical in both directions, hence we shall concen­trate on just one direction of transmission, that from A to D.

At point B, where the 2Mbit/s circuit meets the SDH network, the first operation is to take the incoming plesiochronous hit stream and selectively add 'stuffing' bits in order to 'pad-out' this hit stream to the exact rate required to till the appropriate Synchronous Container. In this case, the Synchronous Container size would be a C12, which is sufficiently large to accommodate a 2Mbit/s plesio­chronous bit stream at the limits of its 50 ppm tolerance, together with some additional 'fixed stuffing' bytes. The stuffing of the plesiochronous bit stream should ideally be done relative to the clock to which the whole SDH network is beating, however, as discussed in Section 42.3, there is a chance that the SDH network element (e.g. multiplexer) which is performing the stuffing oper­ation, is not quite synchronous with the rest of the network. In this case C12 which it creates is similarly asynchronous.

Figure 42.82Mbit/s plesiochronous circuit from A to D, which is transported by an SDH network for part of its journey

Figure 42.9Synchronous multiplexing of VC12s into a VC4 when VC12s are created in various places